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NIT Durgapur Secures ?1.13 Crore International Project to Develop Next-Gen Semiconductor Technology

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Durgapur: In a significant boost to India’s "Atmanirbhar Bharat" mission in the semiconductor sector, the National Institute of Technology (NIT) Durgapur has been awarded a prestigious research grant worth ?1.13 Crore under the Scheme for Promotion of Academic and Research Collaboration (SPARC), Phase 4A.
The project, titled "Hybrid Nano-Pillar Dielectric Stacks for III-V & III-N MOS Platforms," focuses on developing high-speed, multi-functional electronic devices that aim to surpass the performance limits of conventional silicon-based technology.
Sanctioned by the Ministry of Education, Government of India, and coordinated by IIT Kharagpur, the project officially commenced on December 1, 2025. It brings together a tri-nation consortium of experts: Dr. Aniruddha Mondal (Principal Investigator) and Dr. Rabindra Nath Barman (Co-PI) from NIT Durgapur; Dr. Kao-Shuo Chang from National Cheng Kung University, Taiwan; and Prof. Aleksei Tameev from HSE University, Russia.
Speaking on this achievement, Prof. Arvind Choubey, Director of NIT Durgapur, emphasized the strategic importance of this grant for the institute and the nation.
"We are immensely proud to lead this high-value international collaboration," said Prof. Choubey. "As India aggressively builds its semiconductor ecosystem, academic institutions must lead the charge in R&D. This project not only aligns perfectly with the Government’s 'Make in India' initiative but also positions NIT Durgapur as a hub for advanced material research. By partnering with global leaders like Taiwan and Russia, we are ensuring our students and faculty are working at the very cutting edge of technology."
Breaking the Silicon Barrier
The research addresses a critical bottleneck in modern electronics: as devices shrink, they overheat and lose efficiency. The NIT Durgapur team proposes a novel solution using "Hybrid Nano-Pillars"—tiny vertical structures made of magnesium-doped titanium dioxide, capped with hafnium oxide.
"Conventional silicon technology faces severe limitations in speed and thermal stability as we scale down to nanometer sizes," explained Dr. Aniruddha Mondal, Associate Professor of Physics and Principal Investigator of the project. "Our approach uses a unique hybrid nano-pillar dielectric stack. By combining our design with polymer passivation layers developed by our Russian partners and the advanced fabrication capabilities of our Taiwanese partners, we aim to create devices that are faster, thermally robust, and suffer from significantly less energy leakage than what is currently available. This is not just about laboratory research; it is about training the future workforce," added Dr. Mondal. "Under this scheme, our PhD scholars who are working under his guidance will spend three months working in state-of-the-art laboratories in Taiwan and Russia. We will also be hosting two major international workshops right here in Durgapur, specifically targeting students from tier-2 and tier-3 cities to inspire them to join the semiconductor revolution."